Signal multiplexer and multiplexing method

ABSTRACT

The frequencies of input modulated signals fed via ports 11 1  to 11 n  are converted by frequency converting parts 12 1  to 12 n  to different bands, and the converted outputs are applied to power combining part 24 decides if 16 via variable attenuators 21 1  to 21 n , respectively, and provided therefrom as a multiplexed output a portion of which is branched. The envelope power level L is detected by level detecting part 23. Control with the detected level L exceeds a level L s  that is k times the average power of the multiplexed signal k being about 4 to 5, and controls the attenuators 21 1  to 21 n  to attenuate the average power of the modulated signal by k/n-fold or less for about 1/ΔF 0  (sec), where (ΔF 0   Hz! is the frequency bandwidth of the multiplexed signal.

TECHNICAL FILED

The present invention relates to a signal multiplexer which combines thepower of multiple, modulated and different frequency-band signals(hereinafter referred to simply as modulated signals). The signalmultiplexer is applied to, for example, a multi-carrier transmissionsystem used in mobile communications, satellite communications or radiopaging systems.

BACKGROUND ART

FIG. 1 illustrates a conventional signal multiplexer. Input signals frominput port 11₁ to 11_(n) are converted by frequency converting means 12₁to 12_(n) into signals of different frequency bands, respectively. Ineach frequency converting means 12_(i) (i=1, 2, . . . , n), thefrequency of the input signal from the input port 11_(i) is mixed by amultiplier 14_(i) with the frequency f_(i) of a local signal from alocal oscillator 13_(i) and a desired frequency band f_(i) ' is filteredby a band-pass filter 15_(i) from the mixed output as the output of thefrequency converting means 12_(i). Here, the input signal from the inputport 11_(i) is, for example, a baseband signal which is BPSK modulated,QPSK modulated, QAM modulated or an intermediate frequency signal whichis modulated by a certain type of modulation scheme. The output signalsfrom the frequency converting means 12₁ to 12_(n) are linearly combinedby power combining means 16, which provides the combined output to anoutput port 17. The power combining means 16 linearly combines multiple,modulated and different frequency-band signals that are provided from ninput channels and is constructed by a transformer circuit or hybridcircuit. In this way, the n-channel input signals are multiplexed in thefrequency space. The multiplexed signal is output from output port 17 asa multi-carrier signal, which is composed of different frequency-bandsignals and has equally spaced carrier components. In some cases, theband-pass filters 15₁ to 15_(n) are omitted and instead a band-passfilter is provided at the output side of the power combining means 16.

FIG. 2 shows the basic principle of a conventional m-ary FSK signalmultiplexer for m=2. For m>2, the configuration of the multiplexer isthe same as in the case where m=2, except that m local oscillators areused. This conventional multiplexer comprises n (n≧2) m-ary FSKmodulators 5_(i) (i=1, 2, . . . , n) corresponding to n channels and apower combining means 6. Each m-ary FSK modulator 5_(i) is composed ofinput ports 1_(i), m (m=2 in this example) local oscillators 2_(i) and3_(i) which oscillate at different frequencies, and signal switchingmeans 4_(i) which selects and outputs either one of the outputs from theoscillators 2_(i) and 3_(i) in accordance with the code of the inputsignal to the input port 1_(i). The output signals from the m-ary FSKmodulators 5_(i) are different in frequency band and are linearlycombined by the power combining means 6 constructed by a transformercircuit or hybrid circuit, and an FSK signal multiplexed in thefrequency space is provided at an output port 7.

The local oscillators 2_(i) and 3_(i) are all shown to operateindependently of each other. However, in some cases, reference frequencyoscillating means is provided and its output is split into all theoscillators 2_(i) and 3_(i) in order to improve the frequency accuracyof all the local oscillators 2_(i) and 3_(i).

As shown in FIG. 3, the m-ary FSK modulator 5_(i) may sometimes beconstructed by one oscillating means (usually a PLL synthesizer) whichis able to change the frequency of the output signal in accordance withthe signal at the input port 1_(i). The circuit configuration in FIG. 3is identical with that in FIG. 2 except for the provision of referencefrequency oscillating means 8 and the configuration of the m-ary FSKmodulator 5_(i). The m-ary FSK modulator (PLL frequency synthesizer)5_(i) in FIG. 3 is made up of low-pass filter means 9_(i), amplifyingmeans 10_(i), a voltage-controlled oscillator (VCO) 41_(i), a variablefrequency divider 42_(i) and a phase comparator 43_(i). The phasecomparator 43_(i) compares the phases of both signals fed thereto fromthe reference frequency oscillating means 8 and the variable frequencydivider 42_(i). Then, the phase comparator 43_(i) outputs a voltagecorresponding to the phase difference between the two signals. Thevoltage corresponding to the phase difference is applied to a controlport of the VCO 41_(i) via the low-pass filter means 9_(i) and theamplifying means 10_(i). The frequency dividing ratio (1/N_(i)) of thevariable frequency divider 42_(i) is set in accordance with the inputsignal S_(i) ; the VCO 41_(i) outputs a signal of an oscillatingfrequency N_(i) f_(i) =N_(i) f_(r) corresponding to the input signalS_(i).

It is presupposed hitherto that the above n m-ary FSK modulators 5_(i)are operated at different center frequencies (carrier frequencies).However, in some instances, it may employ a construction wherein the nm-ary FSK modulators 5_(i) are operated at the same center frequency(carrier frequency) and frequency converting means is interposed betweenthe outputs of the m-ary FSK modulators 5_(i) and the power combiningmeans 6 in order to convert the frequency of the output signal from eachm-ary FSK modulator 5_(i) to a desired frequency band. The frequencyconverting means is composed of a frequency synthesizer (or localoscillator), a mixer and band-pass filter means.

Note the envelope power of the multiplexed modulated signal that isobtained at the output port 17 in FIG. 1 in the application of theconventional signal multiplexer to actual communication; since thephases of individual modulated signals are variously distributed inspecific ranges, instantaneous phases of the modulated signals readilycoincide and the voltages of the instantaneous modulated signals arecombined in-phase. As a result, the envelope power sharply increases anda peak envelope power (PEP), which is significantly higher than theaverage power level of the envelope power, is often generated.

Also in the case of the signal obtained by multiplexing individual m-aryFSK modulated signals, instantaneous phases of the modulated wavesgenerated by the m-ary FSK modulators readily coincide according to thefrequencies of the modulated waves and their phases at the time offrequency switching, and at that instant, their voltages are combinedin-phase. In consequence, a peak envelope power (PEP) which isdrastically higher than the average power P_(a) of the envelope poweroccurs as shown in FIG. 4. The peak envelope power PEP can increase upto n times (where n is the number of multiplexing) the average powerP_(a).

In either case, if an amplifier is provided at the output port of theconventional signal multiplexer to amplify the multiplexed signal with alow level of distortion, although the peak envelope power PEP issubstantially higher than the average power level of the envelope power,the required saturation power of the amplifier needs to be set largerthan the average power level of the envelope power at least by amultiple of the number of multiplexing--this poses the problem ofhindering miniaturization and power saving of the amplifier.

As a solution to this problem, there is disclosed in Japanese Pat.Laid-Open Gazette No. 30537/92 a construction in which a phase shifteris provided for each channel and its phase shift amount is suitably setto decrease the peak envelope power. This method makes it possible toprevent a large peak from appearing in the envelope power when eachchannel is not modulated, and the method is effective for a modulationscheme that holds the initial phase of the carrier as in the case ofdouble-sideband amplitude modulation. However, since a signal modulatedby a modulation scheme such as phase or frequency modulation undergoes achange in the carrier phase by the modulated input, a large peak canoccur in the peak envelope power of the multi-carrier signal. Further,it is disclosed in FIG. 7 of the above-mentioned Gazette to detect thepower of a specific frequency of the multi-carrier signal and controlthe phase shifter of each channel. However, the Gazette does notconcretely state how each phase shifter is controlled in accordance withthe detected power; hence, the invention of the Gazette cannot becompared with the present invention in this respect.

In Japanese Pat. Laid-Open Gazette No. 204773/94 (U.S. patentapplication Ser. No. 963784 filed Oct. 20, 1992) there is disclosed amethod that monitors the peak envelope power (PEP) of the multi-carriersignal and, when the PEP exceeds a predetermined value, adjusts theshift amount of the phase shifter in each channel to reduce the peakenvelope power PEP of the multi-carrier signal. With this method, sinceit is not clear how the phase shift amount in each channel is controlledas in the case with the first-mentioned Japanese Laid-Open Gazette, theshift amount of the phase shifter is slightly increased or decreased foreach channel, then a check is made to see if the peak envelope power PEPof the multi-carrier signal at that time increases or decreases and theshift amount is controlled to decrease the peak envelope power. Thus, ina very short period of time during which a peak appears in the peakenvelope power, the above-mentioned control needs to be effected foreach phase shifter; namely, this method requires many high-speedprocesses and hence is not practical.

In Japanese Pat. Laid-Open Gazette No. 204959/94 (U.S. patentapplication Ser. No. 964596 filed Oct. 20, 1992), there is disclosed amethod that detects the ratio of the peak envelope power PEP to theaverage power of the multi-carrier signal (PEP/average power) and, whenthis ratio exceeds a predetermined value, controls the phase shifter ofeach channel to reduce the peak envelope power PEP. This method alsoinvolves many high-speed processes and hence is not practical.

Moreover, in Seymour Shlien, "Miniaturization of the Peak Amplitude of aWaveform," Signal Processing 14 (1988), pp. 91-93, there is made aproposal that uses a steepest descent method to search an initial phasecondition that reduces the peak envelope power for a binary FSKmulti-carrier signal of 12 carriers of the same amplitude. No concretecircuit configuration is shown; hence, it is not clear how the proposalis implemented. Besides, in U.S. Pat. No. 5,384,547, issued Jan. 24,1995, there is disclosed a technique that reduces the peak envelopepower of a multi-channel signal by attenuating the signal by an amountdepending on which of multiple threshold values the peak envelope powerhas exceeded. In this instance, the peak envelope power of themulti-channel signal is so high that a high-power-endurable variableattenuator is needed, and if the variable attenuator fails, the functionof limiting the peak envelope power does not work. Additionally, sincethis technique effects control of providing attenuation when the peakenvelope power exceeds the threshold value even for an extremely shorttime, the number of times the peak envelope power is limited inevitablyincreases, giving rise to a problem that the control is performed morethan necessary.

It is an object of the present invention to provide a signal multiplexerwhich prevents a sharp increase in the peak envelope power (PEP) of themultiplexed signal (a multi-carrier signal).

Another object of the prevent invention is to provide a signalmultiplexer which prevents a sharp increase in the peak envelope powerof the multiplexed signal and produces the signal with a relatively lowlevel of distortion.

Another object of the present invention is to provide a signalmultiplexer which multiplexes an m-ary FSK signal and prevents a sharpincrease in the peak envelope power of the multiplexed FSK signal.

Still another object of the present invention is to provide a signalmultiplexer which multiplexes a plurality of modulated signals and, whenthe number of signals to be multiplexed increases, prevents a sharpincrease in the peak envelope power of the multiplexed signal.

SUMMARY OF THE INVENTION

According to a first aspect of the present invention, in a device whichmultiplexes modulated signals from n input systems by power combiningmeans, variable attenuator means are respectively connected in serieswith m' of n input ports of the power combining means for the n (wherem'≦n) input systems, the envelope power level of the signal combined bythe power combining means or the multiplexed signal is detected byenvelope power level detecting means, and when the detected envelopepower level exceeds a predetermined value, a predetermined amount ofattenuation is set by control means in m (where m≦m') of the m' variableattenuator means for a predetermined period of time.

The control means sets a predetermined amount of attenuation for apredetermined period of time when the envelope power level exceeds thepredetermined value in succession a predetermined number of times.Alternatively, the control means sets a predetermined amount ofattenuation for a predetermined period of time when the envelope powerlevel exceeds a predetermined value for more than a predetermined periodof time. In this instance, variable attenuator means may be providedbetween the power combining means and the output port without providingthe variable attenuator means for each input system (second aspect).

According to a third aspect of the present invention, in a method whichlinearly combines n modulated signals into a multiplexed signal, theenvelope power level L of the multiplexed signal is detected, then thedetected level L is compared with a predetermined level L_(s), and ifL>L_(s), m of the n (where m≦n) modulated signals are attenuated aspredetermined for a predetermined period of time.

According to a fourth aspect of the present invention, in a method whichlinearly combines n modulated signals into a multiplexed signal, theenvelope power level L of the multiplexed signal is detected, then thedetected level L is compared with a predetermined level L_(s), and ifL>L_(s), the multiplexed signal is attenuated as predetermined for apredetermined period of time.

In the third and fourth aspects of the invention, when L >L_(s), thecount value is incremented by one, and when the count value M reaches apredetermined value M₀, the predetermined amount of attenuation isprovided; if M<M₀, then the process goes back to the level detectionstep, and if L<L_(s), then the count value M is made zero and theprocess returns to the level detection step.

In the third and fourth aspects of the invention, if L>L_(s), then thecounting of time T begins and when the time T reaches a predeterminedvalue T₀, the predetermined amount of attenuation is provided; if T<T₀,then the process immediately returns to the level detection step, and ifL<L_(s), the process goes back to the level detection step afterresetting the count value T to zero.

In the first and second aspects of the invention the attenuator means iscontrolled when the envelope power level of the multiplexed signalexceeds a predetermined value, but according to fifth and sixth aspectsof the present invention, the average power of the multiplexed signal isdetected by average power detecting means, and when the ratio of thedetected envelope power level to the detected average power exceeds apredetermined value, the attenuator means is controlled.

According to a seventh aspect of the present invention, in an FSK signalmultiplexer which combines the output signals from n (n-channel) m-aryFSK modulating means (where n and m are both integers equal to orgreater than 2) by power combining means; the n m-ary FSK modulatingmeans shift their output frequencies in accordance with the sign of theinput signals thereto based upon a common reference frequency signalfrom reference frequency oscillating means, there are provided variablephase shifter means for shifting the phase of the modulated signal fromeach m-ary FSK modulated means and control means for setting the phaseshift amount of the variable phase shifter means so that the peakenvelope power of the output from the power combining means becomessmall in accordance with the combination of symbols of the n inputsignals in synchronization with the timing at which the m-ary FSKmodulating means switch their output frequencies in accordance with theinput signals thereto.

The m-ary FSK modulating means each comprise m oscillators of differentoscillation frequencies and signal switching means which selects one ofthe m oscillators in accordance with the sign of the input signalthereto and outputs the oscillation signal from the selected oscillator.Alternatively, each m-ary FSK modulation means is constructed by a PLLfrequency synthesizer, or the m-ary FSK modulating means and thevariable phase shifter means in each channel are constructed by a directdigital frequency synthesizer (DDS).

The input signal in each channel is branched by branching means to bothone (common) control means and the corresponding m-ary FSK modulatingmeans, and delay means is inserted in the signal path between thebranching means and the m-ary FSK modulating means.

In the cases where each m-ary FSK modulation means is constructed by moscillators or by a PLL frequency synthesizer, the variable phaseshifter means is disposed at the output side of each m-ary FSKmodulating means or is connected in series with the reference frequencysignal input port of each m-ary FSK modulating means. The control signalfor the variable phase shifter means is processed so that the phase ofthe modulated signal remains continuous before and after its frequencychange caused by a change in the sign of the input signal.

The seventh aspect of the invention is combined with the first or secondaspect.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a conventional signal multiplexer.

FIG. 2 is a block diagram showing the principles of a conventional FSKsignal multiplexer.

FIG. 3 is a block diagram illustrating a concrete example of theconventional FSK signal multiplexer.

FIG. 4 is a diagram showing examples of envelope power waveforms of FSKmultiplexed signals.

FIG. 5 is a block diagram illustrating an embodiment according to afirst aspect of the present invention.

FIG. 6A is a flowchart showing an example of the control operation ofcontrol means 24 in FIG. 5 and the procedure of an embodiment accordingto a third aspect of the invention, and FIG. 6B is a timing chartshowing examples of attenuating operations of variable attenuators 21₁to 21_(n) in the control operation of the control means and theprocedure of the embodiment according to the third aspect of theinvention.

FIG. 7 is a flowchart showing an example of the control operation of thecontrol means 24 in the first and second aspect of the present inventionand procedures of embodiments according to the third and fourth aspectsof the invention.

FIG. 8 is a flowchart showing an example of the control operation of thecontrol means 24 in the first and second aspects of the presentinvention and procedures of other embodiments according to the third andfourth aspects of the invention.

FIG. 9 is a block diagram illustrating an embodiment according to thesecond aspect of the present invention.

FIG. 10 is a block diagram illustrating another embodiment according tothe second aspect of the present invention.

FIG. 11 is a block diagram illustrating another embodiment according tothe first aspect of the present invention.

FIG. 12 is a block diagram illustrating another embodiment according tothe second aspect of the present invention.

FIG. 13 is a block diagram illustrating another embodiment according tothe first aspect of the present invention.

FIG. 14 is a block diagram illustrating an embodiment according to afifth (sixth) aspect of the present invention.

FIG. 15 is a block diagram illustrating an embodiment according to aseventh aspect of the present invention.

FIG. 16 is a timing chart showing operations of principal parts of theFIG. 15 embodiment.

FIG. 17 is a block diagram illustrating an embodiment according to theseventh aspect of the invention which employs a PLL frequencysynthesizer as an m-ary FSK modulator.

FIG. 18 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention which employs a direct digitalfrequency synthesizer DDS as the m-ary FSK modulator.

FIG. 19 is a block diagram illustrating an example of the basicconfiguration of the direct digital frequency synthesizer DDS.

FIG. 20 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 21 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 22 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 23 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 24 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 25 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 26 is a block diagram illustrating another embodiment according tothe seventh aspect of the invention.

FIG. 27 is a block diagram illustrating another embodiment according tothe seventh aspect which is combined with the first aspect of theinvention.

FIG. 28 is a block diagram illustrating still another embodimentaccording to the seventh aspect which is combined with the second aspectof the invention.

FIG. 29 is a flowchart showing the procedure in an embodiment accordingto the third aspect of the invention.

FIG. 30 is a flowchart showing an example of the procedure forcomputation of the phase shift amount to be set in variable phaseshifter means 47_(i) in the seventh aspect of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

In FIG. 5 there is illustrated an embodiment in accordance with thefirst aspect of the present invention, in which the parts correspondingto those in FIG. 1 are identified by the same reference numerals. In thepresent invention: variable attenuators 21₁ to 21_(n) are provided inoutput paths of the frequency converting means 12₁ to 12_(n),respectively; a directional coupler 22 is disposed at the output side ofthe power combining means 16; level detecting means 23 is provided todetect the envelope power level of the combined output signal ormodulated multiplex signal branched by the directional coupler 22; thedetected output from the level detecting means 23 is input into controlmeans 24; and the variable attenuators 21₁ to 21_(n) are controlled bythe control means 24. The variable attenuators 21₁ to 21_(n) can beeasily constructed by PIN diodes and varactor diodes; commerciallyavailable products can be also used. The level detecting means 23 can beconstructed using a diode and a capacitor and detects the level of theenvelope power of the combined output signal from the power combiningmeans 16. The control means 24 comprises, as its basic circuitcomponents, an A/D converter, a microprocessor, a ROM, a RAM and a D/Aconverter and possesses a function of adjusting the setting points ofthe variable attenuators 21₁ to 21_(n) while at the same time monitoringthe input signal from the level detector 23. In FIG. 6A there is shown aflowchart for explaining the control operation of the control means 24.

To begin with, the envelope power level L of the multiplexed signal isdetected by the level detecting means 23 (S₁), and it is decided whetherthe level L exceeds a threshold value L_(s) (S₂). When the level L is inexcess of the threshold value L_(s), the amounts of attenuation of thevariable attenuators 21₁ to 21_(n) are set to d dB! from 0 dB! (S₃). Theoperation of the variable attenuators 21₁ to 21_(n) is limited only to acertain time ΔT as depicted in the timing chart of FIG. 6B; the countingof time (S₄) and the check to see if the time ΔT has elapsed (S₅) arecarried out, and after the elapsed time ΔT, the amounts of attenuationof the variable attenuators 21₁ to 21_(n) are set again to 0 dB! (S₆),after which control returns to the step of detecting the envelope powerlevel L (S₁). When it is found that the level L does not exceed thethreshold value L_(s) at the step S₂, control only returns to the stepS₁ of detecting the envelope power level L and the variable attenuators21₁ to 21_(n) are not adjusted.

Letting ΔT₀ (Hz) represent the frequency spacing between adjacentcarriers in a multi-carrier signal produced by n multiplexing ofmodulated signals, the time during which a peak appears in the envelopepower of the multi-carrier signal can be estimated by T_(p)=1/((n-1)ΔT₀) (sec). This is equal to the reciprocal of the bandwidth ofthe multi-carrier signal. Hence the time ΔT for attenuation in steps S₄and S₅ may preferably be set to T_(p).

In case of setting the threshold value L_(s) in step S₂ to k (in therange of 1 to 10) times the average power P_(a) of the multi-carriersignal, the power for each carrier is adjusted by each variableattenuator 21_(i) to k/n-fold or below. In other words, 10 log (k/n) dBattenuation is provided to the variable attenuator 21_(i). From theviewpoint of miniaturization of the amplifier for amplifying themultiplexed signal from the output port 17, it is preferable that k besmall, but when k is small, frequent control of the amount ofattenuation of the variable attenuator 21_(i) suppresses the amplitudeof each modulated signal, resulting in the signal being distortedaccordingly. Thus it is not preferable to set k too small; it ispractical that k is in the range of 4 to 5.

With constant or intermittent execution of the sequence of control shownin FIG. 6A, when the envelope power level L of the multiplexed signalexceeds the threshold value L_(s), the output level of the multiplexedsignal is attenuated by the variable attenuators 21₁ to 21_(n) for thepredetermined time (ΔT), by which it is possible to prevent a sharpincrease in the peak envelope power PEP of the multiplexed signal.

The threshold value L_(s) is set to a value, for example, about four tofive times larger than average operation power of a power amplifierwhich is connected to the output port 17, though not shown, and it is atmost 0.1 μs that the envelope power level of the multiplexed signalhaving a frequency bandwidth of approximately 10 MHz exceeds a valuefour to five times larger than the above-mentioned average operatingpower; that part of the envelope corresponding to the period of theenvelope power level higher than the threshold value L_(s) graduallyrises just like an elliptic arc. In the case of the above-mentionedmultiplexed signal, signal distortion poses a problem when the part ofthe envelope corresponding to the power level higher than the thresholdvalue L_(s) continues 10 ns or longer. Hence in this example, theenvelope power level L is detected every several nanoseconds, and whenthe envelope power level L exceeds the threshold value L_(s), anattenuation of d=10 dB is set in each of the variable attenuators 21₁ to21_(n) for ΔT=0.1 μs. By effecting the detection control in severalnanoseconds or less, low-distortion amplification is made possible evenif a small amplifier is used.

With the control scheme shown in FIG. 6A, the variable attenuators 21₁to 21_(n) are immediately adjusted when the envelope power level Lexceeds the threshold value L_(s) ; however, it is also possible toprevent the variable attenuators 21₁ to 21_(n) from being automaticallycontrolled in response to an instantaneous increase in the envelopepower level L not much higher than the threshold value L_(s), by makingprovision for adjusting the variable attenuators 21_(i) when the numberof times the envelope power level continuously exceeds the thresholdvalue reaches a predetermined value M₀. In FIG. 7 there is shown, as aflowchart, the control operation of the control means 24 in thisinstance.

In the first place, a variable M representing the number of times theenvelope power level L exceeds the threshold value L_(s) is initialized(M=0)(S₁₁). Next, the envelope power level L of the multiplexed signalis detected by the level detecting means 23 (S₁) and a check is made todetermine if the level L is higher than the threshold value L_(s) (S₂).When the level L is higher than the threshold value L_(s), the variableM is incremented by one (S₁₂). When the level L is not higher than thethreshold value L_(s), control only returns to step S₁₁ wherein M=0 andno adjustment is made to the variable attenuators 21₁ to 21_(n).

When incremented by one, the variable M is compared with a preset valueM₀ (S₁₃). If the variable M is equal to the preset value M₀, then theattenuation amount of the variable attenuators 21₁ to 21_(n) is changedfrom 0 dB! to d dB! (S₃). The variable attenuators 21₁ to 21_(n) performthe same operations as those described above in respect of FIG. 6A, andafter setting the attenuation amount of d for the prescribed time 66 T,control returns to step S₁₁.

When the variable M is not equal to the preset value M₀, control merelyreturns to step S₁ for the detection of the envelope power level L andno adjustment is made to the variable attenuators 21₁ to 21_(n).

With constant or intermittent execution of the above-described sequenceof control, the output level of the multiplexed signal is attenuated bythe variable attenuators 21₁ to 21_(n) for the predetermined time ΔTwhen the envelope power level L of the multiplexed signal continuouslyexceeds the threshold value L_(s) M₀ times, so that it is possible toprevent a substantial increase in the peak envelope power of themultiplexed signal. In the multi-carrier signal, since individualcarrier signals are modulated independently of one another, thefrequency of occurrence of the peak envelope power PEP variously changesin accordance with the modulated carrier signals; it is extremelydifficult to estimate how many times the peak envelope power PEP willexceed a predetermined level per unit time. That is to say, the peakenvelope power PEP might exceed the predetermined level many times insuccession or once at a time. Hence, the number of times M₀ in the aboveexample is twice or more but several times at most.

While the control schemes shown in FIGS. 6A and 7 employ, as a decisioncriterion for adjusting of the variable 21₁ to 21_(n), the number oftimes the envelope power level exceeds the threshold level L_(s), theinvention can use, as another criterion, the time during which theenvelope power level exceeds the threshold level L_(s) continuously, inwhich case, if such a duration is equal to or longer than apredetermined time T₀, adjustment is made to the variable attenuators21₁ to 21_(n). In FIG. 8 there is shown, as a flowchart, the controloperation of the control means 24 in this instance.

The envelope power level L of the multiplexed signal is detected by thelevel detecting means 23 (S₁) and a check is made to determine if thelevel is higher than the threshold level L_(s) (S₂). When the level L ishigher than the threshold level L_(s), the time T during which L exceedsL_(s) (S₂₁) is measured and compared with the preset value To (S₂₂). Ifthe level L does not exceed the threshold value L_(s), control simplyreturns to the step S₁ for the detection of the envelope power level Land no adjustment is made to the variable attenuators 21₁ to 21_(n).

When the time T is equal to or longer than the preset value T₀, anattenuation amount of d is set in the variable attenuators 21₁ to 21_(n)for only the time ΔT, after which control returns to step S₁ for thedetection of the envelope power level L. That is, the processingsubsequent to step S₃ shown in FIG. 6A is carried out. When it is foundin step S₂₂ that the time T is shorter than the preset value T₀, controlsimply returns to step S₁ for the detection of the envelope power levelL and no adjustment is made to the variable attenuators 21₁ to 21_(n).

With constant or intermittent execution of the above-described sequenceof control, the output level of the multiplexed signal is attenuated bythe variable attenuators 21₁ to 21_(n) for only the predetermined timeΔT when the time during which the envelope power level L continuouslyexceeds the threshold value L_(s) is equal to or longer than the presetvalue T₀, so that it is possible to prevent a substantial increase inthe peak envelope power PEP of the multiplexed signal. In the abovecase, the value T₀ is set to tens of nanoseconds or so. In theembodiment of FIG. 8, the envelope power level that exceeds thethreshold value L_(s) for an extremely short time does not seriouslyaffect signal distortion, and hence is ignored with a view to reducingthe number of times the variable attenuators 21₁ to 21_(n) arecontrolled.

FIG. 9 illustrates an embodiment according to the second aspect of thepresent invention. This embodiment differs from the FIG. 5 embodiment inthe provision of only one variable attenuator 21 at a stage posterior tothe directional coupler 22 instead of providing the variable attenuators21₁ to 21_(n) in the output paths of the frequency converting means 12₁to 12_(n). This embodiment also permits prevention of a substantialincrease in the peak envelope power PEP of the multiplexed signal bycontrolling the variable attenuator 21 alone with a scheme similar tothat for controlling the variable attenuators 21₁ to 21_(n) as describedabove with reference to FIG. 6A, 7 or 8.

It is also possible to connect only one variable attenuator 21 betweenthe power combining means 16 and the directional coupler 22 as shown inFIG. 10. Alternatively, the variable attenuator 21 may be providedbetween the power combining means 16 and the output port 17. Further,this embodiment differs from the FIG. 5 embodiment in substitutingsynthesizers 25₁ to 25_(n) for the local oscillators 13₁ to 13_(n) ofthe frequency converting means 12₁ to 12_(n) and in driving thesynthesizers 25₁ to 25_(n) by one reference frequency oscillation means26. With such an arrangement, it is possible to improve the accuracy ofthe carrier frequency in each of the frequency converting means 12₁ to12_(n). The synthesizers 25₁ to 25_(n) can also be employed in theembodiments of FIGS. 5 and 9.

FIG. 11 illustrates an embodiment according to the first aspect of thepresent invention. This embodiment differs from the FIG. 1 embodiment insubstituting frequency modulating means 31₁ to 31_(n) for the frequencyconverting means 12₁ to 12_(n). In the frequency modulating means 31_(i)(where i=1, 2, . . . , n) the frequency of the output signal from a VCO32_(i) is divided by a frequency divider 33_(i) ; the phase of thefrequency-divided output from the frequency divider 33_(i) is comparedby a phase comparator 35_(i) with a reference signal from a referenceoscillator 34_(i) ; the phase-compared output from the phase comparator35_(i) is provided as a control signal to the VCO 32_(i) via a low-passfilter 36_(i) ; a signal (carrier) is provided from the VCO 32_(i) afterthe frequency of the signal is decided by both the frequency dividingratio of the frequency divider 33_(i) and the frequency of the referencesignal from the reference oscillator 34_(i) and is stabilized with thestability of the reference signal; and this carrier is modulated infrequency by the input signal from the input port 22_(i) and is outputfrom the frequency modulating means 31_(i). The frequency dividingratios of the frequency dividers 33₁ to 33_(n) or/and the oscillationfrequencies of the reference oscillators 34₁ to 34_(n) are set todifferent values. Accordingly, individual frequency-modulated signalsfrom the frequency modulating means 31₁ to 31_(n) belong to differentfrequency bands, and usually the carrier frequencies are set to beequally-spaced. Interposed between the frequency modulating means 31₁ to31_(n) and the power combining means 16 are the variable attenuators 21₁to 21_(n). This embodiment is identical in construction and operationwith the FIG. 5 embodiment except in the points mentioned above.

The frequency converting means 12₁ to 12_(n) in FIGS. 9 and 10 may bereplaced with the frequency modulating means 31_(i) to 31_(n) in FIG.11. For example, as depicted in FIG. 12, the frequency modulating means31₁ to 31_(n) in FIG. 11 can be substituted for the frequency convertingmeans 12₁ to 12_(n) in the FIG. 9 embodiment. The FIG. 12 embodimentemploys the common reference frequency oscillation means 26 in place ofthe reference oscillators 34₁ to 34_(n) in FIG. 11. The FIG. 11embodiment may also use the common reference frequency oscillation means26 as a substitute for the reference oscillators 34₁ to 34_(n) as shownin FIG. 12. When the frequency modulating means 31₁ to 31_(n), typicallyshown in FIGS. 11 and 12, are used, the variable attenuators 21_(n) arecontrolled by any one of the schemes described previously with respectof FIGS. 6A, 7 and 8.

In the case where the variable attenuators 21₁ to 21_(n) are separatelyprovided in input paths of the power combining means 16, as shown inFIGS. 5 and 11, and the attenuation amounts for the variable attenuators21₁ to 21_(n) are all set equal, the influence on the signal is the sameas in the case where the multi-carrier signal is attenuated after beingmultiplexed, In the embodiments of FIGS. 9 and 12, when the peakenvelope power PEP exceeds the predetermined values, all carrier(modulated) signals are equally limited (or suppressed)--this isequivalent to intentional distortion of all carrier signals and thereare some cases where the information error of each carrier signalarises.

For reducing the envelope power of the multi-carrier signal, there is noneed to limit the amplitudes of all the carriers (modulated signals)equally. The envelope power from the power combining means 16 could bereduced to a desired level by such an arrangement as shown in FIG. 13,wherein the modulated signals to be multiplexed, that is, the outputsfrom the frequency converting means 12₁ to 12_(n) (or frequencymodulating means 31₁ to 31_(n)) are divided into those to limit theamplitudes and those not to limit, variable attenuators 21₁ to 21_(m)are provided for limiting the amplitudes of output signals from mfrequency converting means 12₁ to 12_(m), and the output sides of theother frequency converting means 12_(m+1) to 12_(n) are connecteddirectly to the power combining means 16. To perform this, the value mis chosen as described below.

Let the average power per modulated signal be represented by P₀ and thenumber of modulated signals (or multiplexing number) by n, and supposethat the envelope power of the multi-carrier signal is suppressed whenit exceeds k times of the overall average power (P_(a) =nP₀) of themulti-carrier signals. In this instance, the peak envelope power PEP ofthe (n-m) non-amplitude-limited modulated signals reaches a maximumvalue of (n-m)² P₀. Since the maximum value is required to be smallerthan the predetermined power knP₀, it is necessary to satisfy thefollowing condition:

    (n-m).sup.2 P.sub.0 ≦knP.sub.0                      (1)

From this equation it follows that ##EQU1## Of the n modulated signals,m or more modulated signals need only to be controlled for attenuation.In this way, at least m modulated signals whose amplitudes are to belimited are chosen in ascending order of severity of limitations oninformation errors.

Now, consider the case where the amplitudes of all the carriers areequally limited. Let it be assumed that the power per carrier, afterbeing limited, is xP₀ (where x<1). The overall average power of themulti-carrier signal in this case is xnP₀ and the peak envelope powerPEP reaches a maximum of xn² P₀. Since it is necessary that the peakenvelope power be smaller than the predetermined power knP₀,

    xn.sup.2 P.sub.0 ≦knP.sub.0                         (3)

Therefore,

    x≦k/n.                                              (4)

Consider the case where n=16 and k=5, for instance. For dividing theoutput signals from the frequency converting or modulating means intothose to limit the amplitudes and those not to limit, n-m≦8 is obtainedfrom Eq. (2). That is, the amplitudes of eight carriers of a total of 16carriers are not limited and the amplitudes of the other remainingcarriers are all reduced to zero when their peak envelope power PEPexceeds a predetermined value--this makes it possible to prevent thepeak envelope power of the multi-carrier signal from exceeding a valuelarger than five times the average power of all the carriers involved.For equally limiting all the carriers, x≦5/16 is obtained from Eq. (4).By controlling its amplitude when the peak envelope power exceeds apredetermined value, each carrier will lose its power by more than half.In this case, an error can occur in the information of each carrier.

As will be seen from the above, the direct reduction of the envelopepower of the multi-carrier signal is equivalent to the equal limitationof the amplitudes of all the carriers; in this instance, there is thepossibility of all the carriers having wrong information. In contrast tothis, in the case where a variable attenuator is provided for eachcarrier and the amplitudes of the modulated signals belonging to aspecified group are limited, it is possible to preclude the possibilityof errors arising in the information of the non-amplitude-limitedmodulated signals.

When one variable attenuator 21 is provided for the multi-carrier signalas shown in FIGS. 9, 10 and 12, there arise problems that the variableattenuator 21 needs to be a high power-endurable type one since the peakenvelope power PEP of the multi-carrier signal is large, and that thefunction of limiting the peak envelope power PEP will be lost if thevariable attenuator 21 fails. On the other hand, when the variableattenuator 21_(i) is provided for each carrier, the attenuator may be alow power-endurable type since the peak envelope power PEP per carrieris not large, and even if one of the variable attenuators 21_(i) fails,the peak envelope power PEP of the multi-carrier signal can besuppressed; though the function is not enough but to some extent. Aswill be understood from the aforementioned group control, x in theamount of power to be limited, xP₀, is changed with the number offailing variable attenuators and the group control is effectedaccordingly. It is also possible to employ an arrangement such asindicated by the broken lines in FIG. 13, in which variable attenuators21_(m) to 21_(n) are additionally provided in the channels wherein noamplitude control normally takes place, that is, the variableattenuators 21_(i) are provided in all the channels; in this instance,the variable attenuators primarily intended for control are selected,but if one or more of them fail, then those of the additionally providedvariable attenuators corresponding to the failing ones can be selectedas the substitutes therefor. In this way, the influence of failures ofthe variable attenuators 21_(i) can be lessened. The above advantagecomes solely from the provision of the variable attenuator for eachcarrier.

Furthermore, in the case where the variable attenuators 21_(i) areprovided in all the channels but attenuation control is carried out foronly m attenuators and the amounts of attenuation are set for zero forthe other remaining n-m variable attenuators, it is possible to adopt acontrol scheme which, upon completion of each or several controloperations for the variable attenuators, changes the group of the mvariable attenuators to be controlled so that signal distortions by theamplitude limitation are made as uniform as possible in all thechannels. For example, in the case of 16 channels the variableattenuators are divided into a group 21₁ to 21₈ and a group 21₉ to 21₁₆,and the two groups are alternately controlled.

The changing of the variable attenuators 21_(i) to be controlled asdescribed above can be made as uniform as possible for all the channelsby using such a scheme as shown in FIG. 29.

To begin with, the number m of variable attenuators to be controlled iscalculated (S₂₄). Letting the number of modulated waves be representedby n and assuming that the envelope power level is held smaller than ktimes (set as L_(s)) of the overall average power of the multi-carriersignal, the number m can be obtained from Eq. (2), that is, m≧n-√kn.Next, a check is made to determine if the condition for controlling thevariable attenuators, that is, any of the conditions in step S₂ of FIG.6A, in step S₁₃ of FIG. 7 and in step S₂₂ of FIG. 8 is satisfied (S₂₅).If the condition is fulfilled, m different integers r₁, r₂, . . . ,r_(m) among 1 to n are determined by the use of random number generatingmeans (S₂₆). The random number used here is, for instance, a uniformrandom number in the sense that any integers are equally likely to beselected. With the use of the uniform random number, any variableattenuators 21_(i) are uniformly selected. Further, since there arewell-known methods for generating random numbers having otherstatistical distributions such as exponential, normal and similarspecific distributions by the use of the uniform random number (see, forinstance, W. H. Press, B. P. Flannery, S. A. Teukolsky and W. T.Vetterling, "Numerical Recipes in C." Cambridge, N.Y., 1990, Chapter 7),random numbers other than a uniform one can also be employed. In short,any random numbers can be used as long as they serve the purpose ofrandomly selecting the variable attenuators 21_(i).

Next, the amounts of attenuation of the variable attenuators 21_(i)(where i=r₁, r₂, . . . , r_(m)) suffixed with the determined integersr₁, r₂, . . . , r_(m) are set to ∞ dB! for a predetermined period oftime (ΔT) (S₂₇). After the elapsed time ΔT since setting the attenuationto ∞ (S₄, S₅), the attenuation amount of the controlled variableattenuators 21_(i) (where i=r₁, r₂, . . . , r_(m)) is reset to 0 dB! andthe process returns to step (S₂₅) for monitoring the envelope powerlevel L (S₂₈).

With this scheme, the variable attenuators that are selected for controlare determined by random numbers each time the envelope power level ofthe multi-carrier signal satisfies the condition for attenuationcontrol. That is, the group of m variable attenuators is changed.

For instance, when n=16 and k=5, m≧8, but assume here that m=8. In thisinstance, eight integers are selected from among 1 to 16 by using theabove-mentioned random numbers. If the eight different integers selectedby the random numbers are, for example, 1, 3, 4, 6, 8, 10, 12 and 15,the variable attenuators to be controlled are 21₁, 21₃, 21₄, 21₆, 2₈,21₁₀, 21₁₂ and 21₁₅. Also in this case, the group of variableattenuators to be controlled for attenuation may be changed by therandom number generation each time the control for the variableattenuators has been effected a predetermined number of times.

As described above, the modulated signals of all the channels (inputroutes) need not always be equally attenuated and no attenuation controlis required for the modulated signals of some channels; accordingly, itis possible to adopt a control scheme that divides all the channels intoa plurality of groups and provides a different attenuation amount foreach group when the peak envelope power of the multi-carrier signalexceeds a predetermined value. For instance, in the case where thechannels are divided into two groups, the attenuation amount for the twogroups are selected different about 3 to 5 dB so that the modulatedsignals, which are required to have a far-lower error rate, areattenuated slightly. In extreme cases, a different attenuation amountmay be provided for each channel (input routes). Besides, it is possibleto change, when required, the channels in which to greatly attenuate themodulated signals; hence, in FIGS. 5, 9, 10, 11 and 12, the variableattenuators 21₁ to 21_(n) are each provided in one of the channels andthese variable attenuators 21₁ to 21_(n) are adapted to be separatelycontrollable by the control means 24.

While in the above the envelope power level (PEP) of the multi-carriersignal or the combined output signal from the power combining means 16is detected by the level detecting means 23 and a check is made todetermine if the detected level L is higher than threshold value L_(s),it is also possible to employ such a configuration as shown in FIG. 14wherein the parts corresponding to those in FIGS. 5, 9, 10, 11 and 12are identified by the same reference numerals and wherein the outputfrom the directional coupler 22 is fed not only to the level detectingmeans 23 but also to average power detecting means 45 to detect theaverage power P_(a) of the multi-carrier signal as well, a ratio L/P_(a)of the peak envelope power PEP detected by the level detecting means 23or the detected level L to the average power P_(a) is calculated by thecontrol means 24, then a check is made to see if the ratio L/P_(a)exceeds a predetermined value A, and if so, a predetermined attenuationamount is set in one or more of the variable attenuators 21₁ to 21_(n)for the predetermined period of time ΔT. In this instance, the variableattenuators may be controlled when the number of times the ratio L/P_(a)continuously exceeds the predetermined value A reaches the predeterminedvalue M₀ as shown in FIG. 7, or the variable attenuators may becontrolled when the L/P_(a) exceeds the value A for longer than thepredetermined period of time T₀ as shown in FIG. 8. Further, it is alsopossible to omit the variable attenuators 21₁ to 21_(n) in FIG. 14 andprovide a variable attenuator 21 at the output side of the powercombining means 16 as indicated by the broken lines.

Next, a description will be given of an embodiment according to theseventh aspect of the present invention which is applied to themultiplexing of FSK modulated signals. FIG. 15 shows the case where m=2,the parts corresponding to those in FIGS. 2 and 3 being identified bythe same reference numerals. In the case where m>2, the deviceconfiguration is the same as in the case of m=2 except that the m-aryFSK modulator 5_(i) includes m oscillators. In this embodiment, onereference frequency oscillation means 8 is provided and variable phaseshifter means 47_(i) are connected between n (where n≧2) m-ary FSKmodulators 5_(i) (where i=1, 2, . . . , n) and input ports of respectivechannels of power combining means 6. The reference frequency signal CLKfrom the reference frequency oscillating means 8 is provided to theoscillators 2_(i) and 3_(i) constructing each m-ary FSK modulator 5_(i),and since the oscillation frequencies of the oscillators 2_(i) and 3_(i)are synchronized with the reference frequency signal CLK, the oscillatoroutput signals have the same initial phase. The phase of the outputsignal from each m-ary FSK modulator 5_(i) is adjusted by the variablephase shifter means 47_(i) corresponding thereto. The input signal S_(i)fed via the input port 1_(i) is branched by branching means 44_(i) intotwo routes and input into the m-ary FSK modulator 5_(i) and a controlinput port 49_(i) of control means 48, respectively. The control means48 sets and adjusts the phase shift amount of each variable phaseshifter means 47_(i) in accordance with a combination of symbols ofinput signals S₁ to S_(n), that is, a combination of n frequencies ofthe outputs from the n m-ary FSK modulators 5_(i) (outputs of theoscillators 2_(i) or 3_(i)) in synchronization with the timing at whichthe output frequency of each m-ary FSK modulator 5_(i) changes. Ofcourse, symbols of the input signals S₁ to S_(n) are synchronized withone another.

The variable phase shifter means 47_(i) is a well-known device that canbe constructed by a circulator, a variable delay line, or a varactordiode (refer to Miyauchi and Yamamoto, "Microwave Circuits forCommunications" pp. 314-321, the Institute of Electronics, Informationand Communication Engineers of Japan, 1981), and a commerciallyavailable product can be also used. The variable phase shifter means47_(i) adjusts the phase of the output signal from the correspondingm-ary FSK modulator 5_(i). The control means 48 comprises, as basiccircuit components, an A/D converter, a microprocessor, a ROM, a RAM, aD/A converter and a filter, and in accordance with the combination ofsymbols of the input signals fed to its control input ports 49_(i)(where i=1 to n), the control means outputs via its control output ports50_(i) control signals V_(i) which adjust the phase shift amounts of thevariable phase shifter means 47_(i) (where i=1 to n) to predeterminedvalues. The operation of the control means 48 will be described below.

In each m-ary FSK modulator 5_(i), the signal switching means 4_(i)selects, in accordance with the symbol of the input signal S_(i), one ofthe outputs from the oscillators whose frequencies are predetermined. InFIG. 16, A and B show, by way of example, the states of the input signalS_(i) to the m-ary FSK modulator 5_(i) and the output frequency thereof.In this case, m=2 and the basic principles are the same also when m>2.In this way, the signal switching means 4_(i) switches the oscillationfrequency to either one of fi-δf Hz! and fi+δf Hz! in accordance withthe symbol of the input signal S_(i). Here, the m-ary FSK signal is amere tone signal except at the time of switching oscillationfrequencies, and the multiplexed FSK signal can be regarded as a nmultitone signal (or multi-frequency signal, i.e. MF signal). The peakenvelope power (PEP) of the n multitone signal varies over a wide rangein accordance with the combination of initial phases of respectivetones. The peak envelope power PEP can be reduced by appropriatelyadjusting the initial phases of the respective tones of the multitonesignal (refer to Narahashi and Nojima, "Peak-factor suppression effectsof multi-carrier system with initial-phase assignment method," SpringNational Convention Record of the Institute of Electronics, Informationand Communication Engineers of Japan, B-388, 1990).

In accordance with the combination of oscillation frequencies which isdependent on the combination of symbols of the input signals to the nm-ary FSK modulators 5_(i), the control means 48 sets, as the phaseshift amount for the variable phase shifter means 47_(i), an initialphase such that the peak envelope power PEP of the combined signal willnot greatly exceed the average power level of the envelope but stay, forexample, several-fold. When the multiplexing number of the m-ary FSKsignal is n, the number of combinations of symbols is m_(n). The controlmeans 48 has a storage means 46 which has stored therein the phase shiftamounts precalculated for all symbol combinations; at the timing whenthe oscillation frequency of the m-ary FSK modulator 5_(i) changes, thatis, at the switching timing when the combination of n frequencies of therespective channels changes, the control means reads out the phase shiftamount, corresponding to the combination of symbols of the input signalsto the control input ports 49_(i) (where i=1 to n), from the storagemeans 46, and provides via the control output port 50_(i) a controlsignal which adjusts the phase shift amount of the variable phaseshifter means 47_(i) on the basis of the read-out value. In other words,the control means adjusts the phase shift amounts of the variable phaseshifter means 47_(i) in synchronization with the frequency switching ofthe output FSK signal from the m-ary FSK modulator 5_(i). For instance,if a voltage-controlled phase shifter is used as the variable phaseshifter means 47_(i), a D/A converter is used to apply a control voltageto the control output port 50_(i). In FIG. 16, C is an example of thevalue set for the phase shift amount of the variable phase shifter means47_(i).

With the above-described procedure, it is possible to prevent asubstantial increase in the peak envelope power PEP of the multiplexedFSK modulated signal.

While the control operation described above is to set the phase shiftamount of the variable phase shifter 47_(i) to a predetermined valueaccording to the combinations of symbols of the input signals to thecontrol input ports 49_(i) of the control means 48, it is also possibleto employ a control scheme wherein the control means 48 sequentiallycalculates the phase shift amount and sets each variable phase shiftermeans 47_(i) to the calculated value. In this case, the control means 48sequentially calculates the phase shift amount by use of amicroprocessor or the like in accordance with the combination of symbolsof the input signals to the control input ports 49_(i) (where i=1 to n)and applies a control signal to each variable phase shifter means 47_(i)via the control output port 50_(i).

The sequential calculation of the phase shift amount of the variablephase shifter means 47_(i) can be done in such a manner as describedbelow. That is, letting the frequencies to be set in the n m-ary FSKmodulation means 5_(i) in accordance with the symbols of the inputsignals be represented by f_(i) (where i=1, . . . , n), a complexenvelope signal u(t) of a signal produced by multiplexing the output FSKsignals of the n m-ary FSK modulating means 5_(i) is expressed by thefollowing equation: ##EQU2## where a is the amplitude of each FSK signaland θ_(i) is the initial phase of an i-th one of the FSK modulatedsignals. Now, let the maximum value of the multiplexed signal in its oneperiod T, which is determined by the combination {θ_(i) } of the initialphases, be represented by A(θ₁, . . . , θ_(n)).

    A(θ.sub.1, . . . , θ.sub.n)=max|u(t)|,t 0,T)(6)

The peak envelope power PEP of the multiplexed signal is proportional tothe square value of A(θ₁, . . . , θ_(n)), and hence can be reduced bycalculating a combination of initial phases {θ'_(i) } which reducesA(θ₁, . . . , θ_(n)) and then the variable phase shifter means 47_(i)for each FSK modulated signal is adjusted in accordance with {θ'_(i) }.

A description will be given, with reference to a flowchart of FIG. 30,of an example of a method for calculating the combination of initialphases {θ'_(i) } which reduces A(θ₁, . . . , θ_(n)).

A(θ₁, . . . , θ_(n)) is calculated for each of a plurality (M₀) ofpredetermined combinations of initial phase and one of the combinationsof initial phases which reduces A(θ₁, . . . , θ_(n)) is output as{θ'_(i) }. The M₀ combinations of initial phases {θ_(i) } are generated,for example, by changing the initial phase θ_(i) (where i=1, . . . , n)of the FSK modulated signals for each minimum phase step (Δθ). SettingΔθ=2π/K (where K is an integer equal to or greater than 2). M₀ =K^(n) incase of taking into account all the combinations of initial phases.

In FIG. 30, the frequency f_(i) of the FSK signal from each m-ary FSKmodulation means 5_(i) is set according to the input signal (symbol)thereto (S₁), and the variable M representing the number of times thecalculation has been conducted is initialized to zero and variableA_(min) representing the minimum one of the calculated values A(θ₁, . .. , θ_(n)) is initialized to na (the maximum value of A(θ₁, . . . ,θ_(n)))(S₂). The M₀ combinations of initial phases {θ_(i) } are each setin a predetermined sequential order (S₃), then A(θ_(i), . . . , θ_(n))is calculated for that combination of initial phases {θ_(i) } (S₄) and acheck is made to see if the calculated A(θ₁, . . . , θ_(n)) is smallerthan a predetermined value A_(th) (S₅). If so, the combination ofinitial phase {θ_(i) } at that time is output as the combination ofinitial phases {θ'_(i) } which reduces A(θ_(i), . . . , θ_(n)) (S₆),thereafter being set in each variable phase shifter means 17_(i) (S₇).

If it is found in step S₅ that A(θ_(i), . . . , θ_(n)) is not smallerthan the predetermined value A_(th), then a check is made to determinewhether A(θ_(i), . . . , θ_(n)) is smaller than the variable A_(min)(S₈); if smaller, A(θ₁, . . . , θ_(n)) is updated with the valueA_(min), then the combination of initial phase {θ_(i) } is output as thecombination of initial phases {θ'_(i) } (S₉) and M is incremented by one(S₁₀).

If it is found in step S₈ that A(θ₁, . . . , θ_(n)) is not smaller thanthe value A_(min), then the process proceeds to step S₁₀. After thevariable M is incremented by one, a check is made to see if the variableM is equal to M₀ (S₁₁); if not, the process returns to step S₃, whereinthe same calculations and processes as described above are carried outusing the next combination of initial phases {θ_(i) }. If M =M₀ in stepS₁₁, then the combination of initial phases {θ'_(i) } at that time isset in each variable phase shifter means 17_(i) (S₇).

In the above, steps S₅ and S₆ may be omitted. In such an instance, fromamong the M₀ predetermined combinations of initial phases, {θ_(i) } thatprovides the minimum value of A(θ₁, . . . , θ_(n)) is selected and usedas the combination of initial phases {θ'_(i) } and the phase shiftamount of each variable shifter means 47_(i) is set accordingly.

In short, since the peak value of the multiplexed signal needs only tobe not more than an allowable value, for example, equal to or less than4 to 5 times the average power of the multiplexed signal itself, it isnot always necessary to calculate the combination of initial phases{θ'_(i) } that minimizes the peak value of the multiplexed signal, onthe basis of the combination of input symbols; the computationalcomplexity could be reduced by using the value A_(th) in step S₅ as theabove-mentioned allowable value. From such a viewpoint, it will beunderstood that the number of calculations involved could be decreasedby setting the initial phase θ_(i) (where i=1, . . . , n) as randomvalues which are uniformly distributed in 0, 2π) in step S₃, instead ofcalculating A(θ_(i), . . . , θ_(n)) for all the combination of phasesthat are generated by changing the initial phases {θ_(i) } with theminimum phase step Δθ=2π/K in 0, 2π) and by setting the value M₀ to anumber smaller than K^(n).

In FIG. 17 there is shown an example wherein each m-ary FSK modulator5_(i) in the FIG. 15 embodiment is constructed by the PLL frequencysynthesizer in FIG. 3, the parts corresponding to those in FIGS. 3 and15 being identified by the same reference numerals.

FIG. 18 illustrates an example wherein the m-ary FSK modulator 5_(i) andthe variable phase shifter means 47_(i) in FIG. 15 are constructed by adirect digital frequency synthesizer (DDS) 51_(i). In FIG. 19 there isshown an example of the basic configuration of the DDS 51_(i) in the DDS51_(i) : the input signal S_(i) provided via the branching means 44_(i)is converted by data converting means 52_(i) into an oscillationfrequency data value; the oscillation frequency data value from the dataconverting means 52_(i) is stored in a frequency register 53_(i) ; theoscillation frequency data value in the frequency register 53_(i) isaccumulated by an accumulator 55_(i) ; the accumulated value is added byan adder 56_(i) to an initial phase data value from a phase register54_(i) ; and the added data value is used to read out data from awaveform ROM 57_(i) ; and the read-out data is converted by and D/Aconverter 58_(i) into an analog signal for output. The direct digitalfrequency synthesizer DDS is supplied with the reference frequencysignal CLK, by which the accumulating operation of the accumulator55_(i) and the read-put operation of the waveform ROM 57_(i) areconducted, the oscillation frequency data value is switched inaccordance with the input signal S_(i) to set the frequency of the FSKsignal to be output, and data corresponding to the control signal V_(i)is set in the phase register 54_(i) to thereby set the phases of the FSKsignal to be output from the DDS 51_(i). The FIG. 18 embodiment isidentical in construction with the FIG. 15 embodiment except for theabove.

It is also possible to employ relatively low-speed and low-cost variablephase shifter means 47_(i) and control means 48 through utilization ofsuch an arrangement as shown in FIG. 20, wherein delay means 59_(i) isconnected in series between each branching means 44_(i) and the DDS51_(i) (or m-ary FSK modulator 5_(i)) so that the inputting of the inputsignal S_(i) to the DDS 51_(i) (or m-ary FSK modulator 5_(i)) is delayedbehind the input to the control means 48.

As shown in FIG. 21, frequency converting means 63 may be provided atthe output side of the power combining means 6 so that the multiplexedsignal from the power combining means 6 is converted by the frequencyconverting means 63 to a signal of a higher frequency band. Thefrequency converting means 63 is made up of a local oscillator 60, amixer 61 for multiplying output signals from the local oscillator 60 andthe power combining means 6, and band-pass filter means 62 provided atthe output side of the mixer 61 to remove signals of unnecessaryfrequency bands resulting from the multiplication.

In FIG. 22, frequency converting means 67_(i) is provided in the outputpath of each DDS 51_(i), and the outputs from the direct digitalfrequency synthesizers 51_(i) to 51_(n) are converted intohigh-frequency signals of different frequency bands, thereafter beingfed to the power combining means 6. In this instance, the centerfrequency (the carrier frequency) of the output from the DDS 51_(i) orm-ary FSK modulator 5_(i) in each channel can be set to a relatively lowfixed value--this facilitates the designing of these circuits includingthe variable phase shifter means and permits the use of inexpensiveparts. In the frequency converting means 67_(i), the output signal froma frequency synthesizer 64_(i), which uses the output from the referencefrequency oscillating means 8 as a reference frequency signal, ismultiplied by the output signal from the DDS 51_(i) in a mixer 65_(i),and the multiplied output is fed to the power combining means viaband-pass filter means 66_(i) wherein signals of unnecessary frequencybands resulting from the multiplication are eliminated.

FIG. 23 illustrates an example in which there is provided at the outputside of each DDS 51_(i) band-pass filter means 68_(i) which permits thepassage therethrough of its output FSK modulated signal, and outputsfrom such band-pass filter means 68_(i) are combined by the powercombining means 6. With the aforementioned m-ary FSK modulated signalgeneration method by switching the output signals from a plurality ofoscillating means (FIG. 15), the phase of the m-ary FSK modulated signalusually becomes discontinuous at the time of switching the oscillationfrequency. Also with the method employing the PLL frequency synthesizers(FIG. 17), similar phase discontinuity occurs when a sharp phase shiftis done by the variable phase shifter means 47_(i). This causesspreading of the spectrum of the output m-ary FSK modulated signal. Theband-pass filter means 68_(i) is used to suppress the spreading of thespectrum. The power-combined output of the modulated signals, with thespreading of their spectra thus suppressed in the respective channels,may be converted by the frequency converting means 63 to ahigh-frequency band signal as depicted in FIG. 21. That is to say, theconfigurations shown in FIGS. 21 and 23 may preferably be combined.

As shown in FIG. 24, low-pass filter means 69_(i) may be providedbetween each DDS 51_(i) and the frequency converting means 67_(i) inFIG. 22. The low-pass filter means 69_(i) is intended to suppress thespreading of the spectrum as is the case with the band-pass filter means68_(i) in the FIG. 23 embodiment.

In FIG. 21, the same effect could be also produced by connecting thelow-pass filter means 69_(i) to the input side of the power combiningmeans 6.

As depicted in FIG. 25, control signal processing means 70 is providedin the control means 48 in FIG. 17, by which the control signal forsetting the phase shift amount of the variable phase shifter means47_(i) is so processed as to suppress the spreading of the spectrum ofthe output m-ary FSK modulated signal, and the thus processed controlsignal is provided to the control output port 50_(i). For example, if avoltage-controlled phase shifter is used as the variable phase shiftermeans 47_(i), phase shift amount data, read out in accordance with thecombination of symbols of the input signals to each control input port49_(i), is converted by a D/A converter to an analog voltage, which isprovided to the control output port 50_(i) after being processed by alow-pass filter so that the phase shift amount of the variable phaseshifter means 50_(i) does not vary stepwise. In FIG. 16D there is shown,comparing with an example which performs no filter processing of thecontrol voltage (FIG. 16C), a waveform of the phase control signal V_(i)which is processed to inhibit the spreading of the spectrum of the m-aryFSK modulated signal. If the m-ary FSK modulated signal multiplexer isconstructed by using the DDS 51_(i), the phase of the m-ary FSKmodulated signal from the DDS 51_(i) could be made continuous byprocessing the data from the control output port 50_(i) to the phaseregister 54_(i) (FIG. 19) with the control signal processing means 70.Incidentally, the same effect can be obtained regardless of whether thecontrol signal processing means 70 is disposed inside or outside of thecontrol means 48.

In the above embodiments employing the variable phase shifter means47_(i), their positions are not limited specifically to those shown;they may be disposed at any other position as long as the phase of eachm-ary FSK modulated signal can be adjusted. FIG. 26 illustrates anembodiment in which the variable phase shifter means 47_(i) is providedin the path over which the reference frequency signal from the referencefrequency oscillating means 8 is fed to each m-ary FSK modulator 5_(i).This embodiment is identical in construction with the FIG. 25 embodimentexcept for the above. Also in this case, the phase of each m-ary FSKmodulated signal can be adjusted by adjusting the phase shift amount ofthe variable phase shifter 47_(i) because the output signal from them-ary FSK modulator 5_(i) is synchronized with the reference signal CLKfrom the reference frequency oscillating means 8.

Incidentally, the part indicated by the DDS 51_(i) in the aboveembodiments may be replaced with such an m-ary FSK modulator 5_(i) andvariable phase shifter means 47_(i) as shown in FIG. 17.

While as shown in FIGS. 15 to 26 the phase shift amount in each channelis controlled in accordance with the combination of symbols of inputsignals to prevent a substantial increase in the peak envelope power ofthe multiplexed m-ary FSK modulated signal, the configuration thereforcan also be used in combination with the configuration that suppressesthe peak envelope power by providing the attenuation as describedpreviously with respect to FIGS. 5 to 12. The basic configurations areshown in FIGS. 27 and 28, in which the parts corresponding to those inFIGS. 5 to 26 are identified by the same reference numerals. In FIG. 27the variable attenuators 21₁ to 21_(n) are connected in series to theoutput sides of the m-ary FSK modulators 5₁ to 5_(n), respectively, thecontrol of the variable attenuators 22₁ to 21_(n) based upon theenvelope power level detected by the level detecting means 6 and thecontrol for the variable phase shifter means 47₁ to 47_(n) are effectedby common control means 81. In FIG. 28 the variable attenuating means 21is connected in series to the output side of the power combining means 6(or 16), the envelope power level of the output multiplexed signal fromthe power combining means 6 is detected by the level detecting means 23.The variable attenuating means 21 and the variable phase shifter means47_(i) to 47_(n) are placed under the control of the control means 81.In FIGS. 27 and 28 it is also possible to construct the m-ary FSKmodulator 5_(i) and the variable phase shifter means 47_(i) by the DDS51_(i) as mentioned previously and convert the signal to ahigh-frequency band at the input or output side of the power combiningmeans 6; furthermore, the modifications and variations describedpreviously in respect of FIGS. 15 to 26 can be applied to theembodiments of FIGS. 27 and 28.

As described above, according to the first to sixth aspects of thepresent invention, it is possible to suppress a large peak envelopepower level of the multiplexed signal. In addition, since the signal isattenuated for only a predetermined period of time, that is, since thesignal is attenuated only to such an extent as the width of aninstantaneous peak value, the information contained in the modulatedsignal only undergoes an instantaneous distortion, and hence is notseriously affected.

In the case where attenuation is provided only when the number of timesor the period of time the envelope power level continuously exceeds apredetermined level reaches a predetermined value, no attenuationcontrol is effected when the amplifier at the preceding stage will notbe greatly affected even if the envelope power level is higher than thepredetermined level. Hence, the information contained in the modulatedsignal is less distorted accordingly.

In case of the device configuration wherein modulated signals aredivided into those to be attenuated and those not, the peak of theenvelope power is suppressed but some of the modulated signals(channels) are entirely free from the influence of the suppression onthe channels where the requirement about the error rate is severe can belessened as compared with the influence of uniform attenuation in allchannels.

According to the seventh aspect of the present invention, the peakenvelope power level of the multiplexed signal can be sufficientlylowered by controlling the phase shift amount of each m-ary FSKmodulated signal in synchronization with a change in the symbol of theinput and by effecting the control for each channel in accordance withthe symbol state of each input signal. Furthermore, the application ofthe first or second aspect to the ninth one of the present inventionensures sufficient suppression of the peak envelope power of themultiplexed signal.

We claim:
 1. A signal multiplexer wherein modulated signals of differentfrequency bands fed via n input channels are combined by power combiningmeans to a multiplexed signal for output to an output port, n being aninteger equal to or greater than 2, said signal multiplexercomprising:m' variable attenuating means connected in series to an inputport of said power combining means in association with m' ones of said ninput channels, where m'≦n; envelope power level detecting means fordetecting the envelope power level of said multiplexed signal; andcontrol means for setting predetermined attenuation amount in m ones ofsaid variable attenuating means for a predetermined period of time whensaid detected envelope power level exceeded a predetermined level, wherem≦m'.
 2. The signal multiplexer of claim 1, wherein said predeterminedattenuation amount set in said attenuating means is the same.
 3. Thesignal multiplexer of claim 2, wherein said m is n, said predeterminedlevel is k times the average power of said multiplexed signal, k beingsubstantially in the range of 1 to 10, and said predeterminedattenuation amount is equal to or more than 10 log (k/n). db!.
 4. Thesignal multiplexer of claim 1, wherein said predetermined level is ktimes the average power of said multiplexed signal, k beingsubstantially in the range of 1 to 10, m<n, (n-m) is set to a valueequal to or smaller than the maximum integer not greater than √kn ,attenuation amount of (n-m) ones of said variable attenuating means inwhich said predetermined attenuation amount is not set is set to zero,and said predetermined attenuation amount of m variable attenuatingmeans other than said (n-m) ones is set to infinity.
 5. The signalmultiplexer of claim 1, wherein m<n, and further comprising:switchingmeans whereby said variable attenuating means in which saidpredetermined attenuation amount is set and said variable attenuatingmeans in which said predetermined attenuation amount is not set areswitched each time when said attenuation amount is set once or moretimes.
 6. The signal multiplexer of claim 5, wherein said switchingmeans is means for randomly selecting m ones of said variableattenuating means among n ones of said variable attenuating means. 7.The signal multiplexer of claim 5, wherein said predetermined level is ktimes the average power of said multiplexed signal, k beingsubstantially in the range of 1 to 10, (n-m) is set to a value equal toor smaller than the maximum integer not greater than √kn, attenuationamount of (n-m) ones of said variable attenuating means in which saidpredetermined attenuation amount is not set is set to zero, and saidpredetermined attenuation amount of m variable attenuating means otherthan said (n-m) ones is set to infinity.
 8. The signal multiplexer ofclaim 1, wherein some of said predetermined attenuation amounts aredifferent from others in said variable attenuating means.
 9. The signalmultiplexer of claim 1, wherein said predetermined level is k times theaverage power of said multiplexed signal, k being substantially in therange of 1 to
 10. 10. A signal multiplexer wherein modulated signals ofdifferent frequency bands fed via n input channels are combined by powercombining means to a multiplexed signal for output to an output port, nbeing an integer equal to or greater than 2, said signal multiplexercomprising:variable attenuating means connected in series between saidpower combining means and said output port; envelope power leveldetecting means for detecting the envelope power level of saidmultiplexed signal; and control means for setting predeterminedattenuation amount in said variable attenuating means for apredetermined period of time when said detected envelope power levelexceeds a predetermined level which is k times the average power of saidmultiplexed signal, k being substantially in the range of 1 to
 10. 11.The signal multiplexer of any one of claims 1 to 10, wherein saidpredetermined period of time is about T_(p) =1/ΔF₀ (sec), ΔF₀ Hz! beingthe bandwidth of said multiplexed signal.
 12. The signal multiplexer ofany one of claims 1 to 10, wherein said control means is means forsetting said predetermined attenuation amount when said detectedenvelope power level continuously exceeds said predetermined level morethan a predetermined number of times.
 13. The signal multiplexer ofclaim 12, wherein said predetermined period of time is about T_(p)=1/ΔF₀ (sec), ΔF₀ Hz! being the bandwidth of said multiplexed signal.14. The signal multiplexer of any one of claims 1 to 10, wherein saidpredetermined control means is means for setting said attenuation amountwhen said detected envelope power level continuously exceeds saidpredetermined level for longer than a predetermined period of time. 15.The signal multiplexer of claim 14, wherein said predetermined period oftime is about T_(p) =1/ΔF₀ (sec), ΔF₀ Hz! being the bandwidth of saidmultiplexed signal.
 16. A signal multiplexer wherein modulated signalsof different frequency bands fed via n input channels are combined bypower combining means to a multiplexed signal for output to an outputport, n being an integer equal to or greater than 2 comprising:nvariable attenuating means connected in series to input ports of saidpower combining means in respective input channels; envelope powerdetecting means for detecting the envelope power level of saidmultiplexed signal; average power detecting means for detecting theaverage power of said multiplexed signal; and control means for settingpredetermined attenuation amount in m ones of said variable attenuatingmeans for a predetermined period of time when the ratio of said detectedenvelope power level to said detected average power exceeds apredetermined value, where m≦n.
 17. A signal multiplexing method whereinmodulated signals of different frequencies fed via n input channels arecombined to a multiplexed signal for output, n being an integer equal toor greater than 2, said method comprising the steps of:detecting theenvelope power level of said multiplexed signal; comparing said detectedenvelope power level with a predetermined level; and providingpredetermined attenuation amount to m ones of said n modulated signalfor a predetermined period of time when said detected envelope powerlevel is higher than said predetermined level, where m≦n.
 18. The signalmultiplexing method of claim 17, wherein said m is smaller than n, andfurther comprising a step of changing the combination of m modulatedsignals to be attenuated each time when said predetermined attenuationamount is provided.
 19. A signal multiplexing method wherein modulatedsignals of different frequencies fed via n input channels are combinedto a multiplexed signal for output, n being an integer equal to orgreater than 2, said method comprising the steps of:detecting theenvelope power level of said multiplexed signal; comparing said detectedenvelope power level with a predetermined level; and providingpredetermined attenuation amount to said multiplexed signal for apredetermined period of time when said detected envelope power level ishigher than said predetermined level.
 20. The signal multiplexing methodof any one of claims 17 to 19, wherein said step of providingpredetermined attenuation amount comprises the steps of:incrementing acount value by one when said detected envelope power level is higherthan said predetermined level; making a check to determine if saidincremented count value reaches a predetermined value and, if so,causing the provision of said predetermined attenuation amount to beexecuted and, if not, returning to said envelope power level detectingstep; and resetting said count value to zero and returning to saidenvelope power level detecting step if said detected envelope powerlevel is lower than said predetermined level.
 21. The signalmultiplexing method of any one of claims 17 to 19, wherein said step ofproviding predetermined attenuation amount comprises the stepsof:beginning the counting of time if said detected envelope power levelis higher than said predetermined level; making a check to determine ifsaid time count reaches a predetermined value and, if so, causing theprovision of said predetermined attenuation amount to be executed and,if not, returning to said envelope power level detecting step; andresetting said time count value to zero and returning to said envelopepower level detecting step if said detected envelope power level islower than said predetermined level.
 22. A signal multiplexer wherein nm-ary FSK modulating means for shifting their output frequencies inaccordance with the symbols of input signals thereto are supplied with acommon reference frequency signal from reference frequency oscillatingmeans as the reference for the frequency of the output signal from eachof said m-ary FSK modulating means and said output signals are combinedby power combining means for output, where m and n are integers eachequal to or greater than 2, said signal multiplexer comprising:variablephase shifter means for shifting the phases of the output modulatedsignals from said m-ary FSK modulating means; and control means forsetting the phase shift amounts of said phase shifter means to reducethe peak envelope power of the output from said power combining means,in accordance with a combination of symbols of said n input signals insynchronization with the timing for said m-ary FSK modulating means toswitch their output frequencies according to the input signals thereto.23. The signal multiplexer of claim 22, wherein said m-ary FSKmodulating means each comprise m oscillators of different oscillationfrequencies, and signal switching means for selectively outputting theoscillation signal from one of said m oscillators in accordance with thesymbol of said input signal, and said variable phase shifter means areeach connected in series to the output side of one of said m-ary FSKmodulating means.
 24. The signal multiplexer of claim 22, wherein saidm-ary FSK modulating means each comprise m oscillators of differentoscillation frequencies, and signal switching means for selectivelyoutputting the oscillation signal from one of said m oscillators inaccordance with the symbol of said input signal, and said variable phaseshifter means are each connected in series to an input port of one ofsaid m-ary FSK modulating means to which said reference frequency signalis input.
 25. The signal multiplexer of claim 23, wherein said m-ary FSKmodulating means are each constructed by a PLL frequency synthesizer,and said variable phase shifter means are each connected in series to anoutput side of one of said m-ary FSK modulating means.
 26. The signalmultiplexer of claim 24, wherein said m-ary FSK modulating means areeach constructed by a PLL frequency synthesizer; and said variable phaseshifter means are each connected in series to an input port of one ofsaid m-ary FSK modulating means to which said reference frequency signalis input.
 27. The signal multiplexer of claim 22, wherein said m-ary FSKmodulating means and said variable phase shifter means in each of saidchannels are constructed by a directed digital frequency synthesizer.28. The signal multiplexer of any one of claims 22 to 27, furthercomprising:n branching means each for branching said input signal insaid each channel for supply to both one of said m-ary FSK modulatingmeans and said control means; and delay means provided in a path of saidinput signal between said each branching means and said m-ary FSKmodulating means corresponding thereto.
 29. The signal multiplexer ofany one of claims 22 to 27, wherein frequency converting means isprovided at the output side of said power combining means to convertsaid combined signal therefrom to a high-frequency signal.
 30. Thesignal multiplexer of claim 29, wherein low-pass filter means isprovided at the input side of said power combining means in each channelto limit the bandwidth of said modulated signal.
 31. The signalmultiplexer of any one of claims 22 to 27, wherein frequency convertingmeans is provided at the input side of said power combining means ineach channel to convert said modulated signal thereto to ahigh-frequency signal.
 32. The signal multiplexer of claim 31, whereinlow-pass filter means is provided at the input side of each of saidfrequency converting means to limit the bandwidth of said modulatedsignal.
 33. The signal multiplexer of any one of claims 22 to 27,wherein band-pass filter means is provided at the input side of saidpower combining means in each channel to limit the bandwidth of saidmodulated signal.
 34. The signal multiplexer of any one of claims 22 to27, wherein said control means has storage means for phase shift amountsto be set in said variable phase shifter means in accordance with thecombination of symbols of said n input signals.
 35. The signalmultiplexer of any one of claims 22 to 27, wherein said control meanshas means for sequentially calculating the phase shift amounts to be setin said variable phase shifter means in accordance with the combinationof symbols of said input signals.
 36. The signal multiplexer of any oneof claims 22 to 27, wherein said control means has control signalprocessing means for processing a control signal to control the phaseshift amounts of said variable phase shifter means so that the phase ofeach FSK modulated signal to be input into said power combining means iscontinuous.
 37. The signal multiplexer of any one of claims 22 to 27,further comprising:n variable attenuating means each connected in seriesto the output side of one of said m-ary FSK modulating means; means fordetecting the envelope power level of the combined output signal fromsaid power combining means; and control means for setting predeterminedattenuation amount in p ones of said variable attenuating means for apredetermined period of time when said detected envelope power levelexceeds a predetermined value, where p≦n.
 38. The signal multiplexer ofany one of claims 22 to 27, further comprising:variable attenuatingmeans connected in series to the output side of said power combiningmeans; means for detecting the envelope power level of the combinedoutput signal from said power combining means; and control means forsetting predetermined attenuation amount in said variable attenuatingmeans for a predetermined period of time when said detected envelopepower level exceeds a predetermined value.